Julian Holley

Movies of experiments described in `Logical and
Arithmetic Circuits Constructed in Geometric Arrangements of
Belousov Zhabotinsky Encapsulated Discs'. Experiments
conducted by Ishrat
Jahan and Ben De Lacy
Costello.

Figure 1 Diode
Junction (blocking). Wave signal propagates downwards from
disc A. The restriction of the connecting pore at the entry
into lowest vertical disc prevents the wave propagating down
the horizontally attached. The original numerical simulation
can be seen here in Figure
18(b). |
||

Figure 1 Diode
Junction (passing). Wave signal propagates horizontally (left
to right) from disc B. The broad connecting pore into the
corner junction disc allows the wave to spread out in the
disc and propagate vertically towards disc A. The original
numerical simulation can be seen here in Figure
18(a) |
||

Figure 2 Dual
input NAND Gate (input 0,0 = 1). No signal waves are present
in the input discs A and B. Constant logical truth `1'
travels uninterrupted to output disc Z. |
||

Figure 2 Dual
input NAND Gate (input 0,1 = 1). A signal wave at input disc
B propagates horizontally (right to left). A constant truth
input `1' also propagates horizontally in the opposite
direction. The two waves do not interact and the constant
truth propagates uninterrupted to the output disc Z. The
original numerical simulation can be seen here in Figure
9(c) |
||

Figure 2 Dual
input NAND Gate (input 1,1 = 0). Waves at inputs discs A & B
travel inwards colliding in the top central disc. The
downwards vertical ejection wave then deflects the
horizontally propagating logical truth `1' interrupting
the output towards output disc Z. The original numerical
simulation can be seen here in Figure
9(d) |
||

Figure 3 Dual
input XOR Gate (input 0,0 = 0) No waves are inserted into
input discs A and B. Two wave inputs representing logical
truths `1' propagating horizontally (left to right,
bottom) and vertically (top to bottom, central). The two
signals collide and extinguish in the disc left of the
output disc X. The original numerical simulation can be
found be seen here in Figure
12(a) |
||

Figure 3 Dual
input XOR Gate (input 0,1 = 1 Part A). (This operation has
been divided into two moving images, please consider in
conjunction with Part B below). Inputs A = 1 and B = 0 in
conjunction with the two logical truth signals `1' are
applied centre top and bottom left. The input signal from A
collides with top most logical truth `1' travelling from
top to bottom. In this experiment the bottom left logical
truth `1' fails to propagate from left to right. The top
to bottom travelling wave has been extinguished by the input
A and consequently fails to reach the bottom horizontal
path. The normal propagation from the bottom left to right
logical input can be observed in Part B (below). The
original numerical simulation can be here in Figure
12(b) |
||

Figure 3 Dual
input XOR Gate (input 0,1 = 1 Part B).(This operation has
been divided into two moving images, please consider in
conjunction with Part A above). All inputs are zero with the
exception of the bottom left logical truth `1'. This
image illustrates the normal propagation of this input which
when combined with Part A (above) provides the logical
function. The original numerical simulation can be seen here
in Figure
12(b) |
||

Figure 3 Dual
input XOR Gate (input 1,1 = 0). Logical truths on both
inputs A and B simultaneously collide with the constant
logical truth travelling from top to bottom. The ejection
wave from this 3 wave collision progresses downwards and
then collides with the logical truth `1' travelling
horizontally from left to right. An output wave thus fails
to propagate into the output disc X. The original numerical
simulation can be seen here in Figure
12(d) |
||

Figure 4.
Composite 1 bit half adder circuit (XOR, sum
operation). Sum, X = (A XOR B); Carry, Z = (A AND B). A sum
(X) output is only possible when only either input A or B
waves are active. A wave propagates from input B into the
large central reaction disc. A portion of the wave front
spreads upwards from the central disc and is guided by the
interconnecting disc to the output disc X. The original
numerical simulation can be seen here in Figure
17(a) |
||

Figure 4.
Composite 1 bit half adder circuit (AND, carry
operation). Sum, X = (A XOR B); Carry, Z = (A AND B). A
carry output (Z) is active when both input waves are active,
simultaneously blocking the sum (X) output. Two waves
propagate from input discs A & B. The two waves collide in
the large central reaction chamber. The collision results
in two ejection waves, the lower of which propagate into
output disc Z. The original numerical simulation can be
seen here in Figure
17(c) |
||

A full
description of the experiments are described in `Logical and
Arithmetic Circuits Constructed in Geometric Arrangements of
Belousov Zhabotinsky Encapsulated Discs'. Experiments
conducted by Ishrat
Jahan and Ben De Lacy
Costello. |
||